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CAT24C208
Functional Description
The CAT24C208 has a total memory space of 1K bytes
which is accessible from either of two I 2 C interface ports,
(DSP_SDA and DSP_SCL) or (DDC_SDA and
DDC_SCL), and with the use of segment pointer at address
60h. On power up and after any instruction, the segment
pointer will be in segment 00h for DSP and in segment 00h
of the bank selected by the configuration register for DDC.
The entire memory appears as contiguous memory space
from the perspective of the display interface (DSP_SDA and
DSP_SCL), see Figure 4, and Figures 14 to Figure 21 for a
complete description of the DSP Interface.
A configuration register at addresses 62/63h is used to
configure the operation and memory map of the device as
seen from the DDC interface, (DDC_SDA and DDC_SCL).
Read and write operations can be performed on any
location within the memory space from the display DSP
interface regardless of the state of the EDID SEL pin or the
activity on the DDC interface. From the DDC interface, the
memory space appears as two 512 byte banks of memory,
with 2 segments each 00h and 01h in the upper and lower
bank, see Figure 3.
Each bank of memory can be used to store an E ? EDID
data structure. However, only one bank can be read through
the DDC port at a time. The active bank of memory (that is,
the bank that appears at address A0h on the DDC port) is
controlled through the configuration register at 62/63h and
the EDID_SEL pin.
No write operations are possible from the DDC interface
unless the DDC Write Enable bit is set (WE = 1) in the device
configuration register at device address 62h.
The device automatically arbitrates between the two
interfaces to allow the appearance of individual access to the
memory from each interface.
In a typical E ? EDID application the EDID_SEL pin is
usually connected to the “Analog Cable Detect” pin of a
VESA M1 compliant, dual ? mode (analog and digital)
display. In this manner, the E ? EDID appearing at address
A0h on the DDC port will be either the analog or digital
E ? EDID, depending on the state of the “Analog Cable
Detect” pin (pin C3 of the M1 ? DA connector). See Figure 2.
28
DDC +5V
+5V DC
(SUPPLIED
BY DISPLAY)
47.5K
10K
8
1
E ? EDID
TO HOST
C3
27
26
DDC CLK
DDC DATA
7
6 EEPROM
5
2
3
4
I 2 C TO PROJECTOR/MONITOR
DISPLAY CONTROLLER
CONTROLLER
Fuse, Resistor or Other Current
Limiting Device Required in All
M1 Displays
8
HPD
2A MAX
RELAY CONTACTS SHOWN IN
DE ? ENERGIZED POSITION
Figure 2.
MEMORY ARRAY
MEMORY ARRAY
Upper
Bank
01
00
Segment 1
256 Bytes
Segment 0
00
11
10
Segment 3
256 Bytes
Segment 2
256 Bytes
256 Bytes
Lower
Bank
01
00
Segment 1
256 Bytes
Segment 0
256 Bytes
00
01
00
Segment 1
256 Bytes
Segment 0
256 Bytes
00
Segment Pointer
Segment Pointer
Address by Configuration
Register (see Table 10)
No Segment Pointer
Figure 3. DDC Interface
http://onsemi.com
4
No Segment Pointer
Figure 4. DSP Interface
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相关代理商/技术参数
CAT24C21LI 功能描述:电可擦除可编程只读存储器 1K Dual Mode Serial RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8
CAT24C21WGI 制造商:Rochester Electronics LLC 功能描述: 制造商:Catalyst Semiconductor 功能描述:
CAT24C21WGI-T3 制造商:Rochester Electronics LLC 功能描述: 制造商:Catalyst Semiconductor 功能描述:
CAT24C21WI 功能描述:电可擦除可编程只读存储器 1K Dual Mode Serial RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8
CAT24C21WI-G 制造商:Rochester Electronics LLC 功能描述: 制造商:ON Semiconductor 功能描述:
CAT24C21WI-GT3 功能描述:电可擦除可编程只读存储器 1K DUAL MODE SER 电可擦除可编程只读存储器 RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8
CAT24C21WI-T3 制造商:ON Semiconductor 功能描述:1K DUAL MODE SERIAL EEPROM - Tape and Reel
CAT24C21ZI 制造商:Catalyst Semiconductor 功能描述: